Analog Mixed‑Signal Verification Engineer at ADVANS Group

Descrição da Função:

Últimas informações de emprego de ADVANS Group para o cargo de Analog Mixed‑Signal Verification Engineer. If the Analog Mixed‑Signal Verification Engineer vaga em Portugal corresponde às suas qualificações, submeta a sua candidatura ou CV atualizado diretamente através do portal Jobkos.

Tenha em atenção que candidatar-se a um emprego exige o cumprimento de requisitos da empresa. Esperamos que a oportunidade em ADVANS Group para o cargo de Analog Mixed‑Signal Verification Engineer abaixo seja adequada ao seu perfil.

At Advans, we support clients across a wide range of industries — including energy, semiconductors, defense, aerospace, transportation, and more — through four core areas of expertise: microelectronics (FPGA, ASIC, SoC), electronic boards, embedded software, and systems engineering.

As a AMS Verification Engineer, you will join a team working on complex Analog Mixed-Signal (AMS) ASIC products, under the guidance of the AMS Verification Leader and alongside experienced verification engineers.

This role is a great opportunity for a engineer looking to develop strong expertise in AMS verification, mixed-signal modeling, and ASIC verification methodologies within challenging semiconductor projects.

Your main responsibilities

AMS Verification

• Contribute to the verification of AMS IPs at IP and top level
• Support the execution of verification plans for DC/DC converter IPs and their integration
• Participate in coverage analysis and verification closure activities
• Help debug and analyze simulation issues

System-Level AMS Verification

• Contribute to the development and maintenance of AMS Top Cell verification environments
• Help verify consistency between behavioral models and transistor-level implementations
• Participate in the validation of analog/digital interactions at system level

Modeling and Abstraction

• Contribute to AMS model development using wreal (Real Number Modeling)
• Participate in model creation using Verilog-AMS and SystemVerilog RNM
• Learn to structure models based on physical quantities such as voltage, current, and impedance

Digital Verification Integration

• Contribute to SystemVerilog / UVM verification environments
• Support the integration of AMS models into digital verification testbenches
• Participate in regression execution, test development, and debug

Protocols and Interfaces

• Contribute to the modeling and verification of interfaces such as PSI5

Team Collaboration

• Work closely with design, architecture, validation, and verification teams
• Participate in design and verification reviews
• Learn from experienced engineers and progressively grow your autonomy

Profile we are looking for

Education

• Master’s degree or Engineering degree in Electronics, Microelectronics, or Embedded Systems

Experience

• Minimum 1 year of experience (including internships or Primeira professional experience) in AMS verification, ASIC design, or mixed-signal environments
• A Primeira exposure to semiconductor verification methodologies is appreciated

Technical skills

The following skills are considered a strong plus:

• Knowledge of AMS verification principles
• Primeira experience or academic exposure to mixed-signal modeling
• Familiarity with wreal, Verilog-AMS, or SystemVerilog RNM
• Basic understanding of physical quantities such as voltage, current, and impedance
• Knowledge of SystemVerilog / UVM
• Exposure to DC/DC converters or power management concepts
• Familiarity with PSI5 or similar interfaces
• Knowledge of Cadence, Synopsys, or equivalent AMS simulation tools

Soft skills

• Analytical mindset and strong curiosity
• Eagerness to learn and grow technically
• Good communication and teamwork skills
• Autonomous, rigorous, and quality-oriented
• Interest in complex semiconductor systems

Nice to have

• Exposure to automotive applications
• Awareness of functional safety standards (ISO 26262)

Benefits

• Integration program in a professional, young & dynamic team
• Professional development opportunities
• Competitive salaries & benefits
• Health insurance
• International work environment

Informação da Vaga:

• Empresa: ADVANS Group
• Cargo: Analog Mixed‑Signal Verification Engineer
• Local de Trabalho: Portugal
• País: PT

Como enviar a sua candidatura:

Após ler e compreender os critérios e requisitos mínimos explicados na informação da vaga Analog Mixed‑Signal Verification Engineer at the office Portugal acima, prepare de imediato os documentos de candidatura, tais como carta de apresentação, CV, cópia do diploma e outros anexos. Envie através do link 'Próxima Página' abaixo.

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